Interconnection Networks,
Edition 1
By Jose Duato, Sudhakar Yalamanchili and Lionel Ni

Publication Date: 29 Jul 2002
Description

The performance of most digital systems today is limited by their communication or interconnection, not by their logic or memory. As designers strive to make more efficient use of scarce interconnection bandwidth, interconnection networks are emerging as a nearly universal solution to the system-level communication problems for modern digital systems.

Interconnection networks have become pervasive in their traditional application as processor-memory and processor-processor interconnect. Point-to-point interconnection networks have replaced buses in an ever widening range of applications that include on-chip interconnect, switches and routers, and I/O systems.

In this book, the authors present in a structured way the basic underlying concepts of most interconnection networks and provide representative solutions that have been implemented in the industry or proposed in the research literature.

Key Features

* Gives a coherent, comprehensive treatment of the entire field* Presents a formal statement of the basic concepts, alternative design choices, and design trade-offs* Provides thorough classifications, clear descriptions, accurate definitions, and unified views to structure the knowledge on interconnection networks* Focuses on issues critical to designers
About the author
By Jose Duato, Ohio State University; Sudhakar Yalamanchili, Georgia Institute of Technology and Lionel Ni, Professor and Head of Computer Science Department at Hong Kong University of Science and Technology
Table of Contents
ForewordForeword to the First PrintingPrefaceChapter 1 - IntroductionChapter 2 - Message Switching LayerChapter 3 - Deadlock, Livelock, and StarvationChapter 4 - Routing AlgorithmsChapter 5 - CollectiveCommunicationSupportChapter 6 - Fault-Tolerant RoutingChapter 7 - Network ArchitecturesChapter 8 - Messaging Layer SoftwareChapter 9 - Performance EvaluationAppendix A - Formal Definitions for Deadlock AvoidanceAppendix B - AcronymsReferencesIndex
Book details
ISBN: 9781558608528
Page Count: 624
Retail Price : £71.00
Ashenden: THE DESIGNER'S GUIDE TO VHDL, Second Edition (2001, MK, ISBN 1-55860-674-2)De Micheli/Ernst/Wolf: READINGS IN HARDWARE/SOFTWARE CO-DESIGN (2001, MK, ISBN 1-55860-702-1)Hennessy/Patterson: COMPUTER ARCHITECTURE 3E (May 2002, MK, ISBN 1-55860-596-7)Walrand/Varaiya: HIGH-PERFORMANCE COMMUNICATION NETWORKS, 2ED (1999, MK, ISBN 1-55860-574-6)
Audience
Practitioners, researchers and students in Computer Architecture and Digital System Design.